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LTM4613
APPLICATIONS INFORMATION
Table 3. 12V and 15V Outputs
DERATING CURVE
Figures 13, 15
Figures 13, 15
Figures 13, 15
Figures 14, 16
Figures 14, 16
Figures 14, 16
V IN (V)
24, 36
24, 36
24, 36
24, 36
24, 36
24, 36
POWER LOSS CURVE
Figure 9
Figure 9
Figure 9
Figure 9
Figure 9
Figure 9
AIRFLOW (LFM)
0
200
400
0
200
400
HEAT SINK
None
None
None
BGA Heat Sink
BGA Heat Sink
BGA Heat Sink
θ JA (°C/W)
≈14
≈10
≈10
≈13
≈8
≈8
Table 4. 5V Output
DERATING CURVE
Figure 11
Figure 11
Figure 11
Figure 12
Figure 12
Figure 12
V IN (V)
36
36
36
36
36
36
POWER LOSS CURVE
Figure 10
Figure 10
Figure 10
Figure 10
Figure 10
Figure 10
AIRFLOW (LFM)
0
200
400
0
200
400
HEAT SINK
None
None
None
BGA Heat Sink
BGA Heat Sink
BGA Heat Sink
θ JA (°C/W)
≈11
≈9
≈9
≈11
≈8.5
≈8.5
Heat Sink Manufacturer
Wakefield Engineering
Part No: LTN20069
Phone: 603-635-2800
Safety Considerations
The LTM4613 modules do not provide isolation from V IN
to V OUT . There is no internal fuse. If required, a slow blow
fuse with a rating twice the maximum input current needs
to be provided to protect each unit from catastrophic
failure.
Layout Checklist/Example
The high integration of LTM4613 makes the PCB board
layout very simple and easy. However, to optimize its
electrical and thermal performance, some layout consid-
erations are still necessary.
? Use large PCB copper areas for high current path, in -
cluding V IN , PGND and V OUT . It helps to minimize the
PCB conduction loss and thermal stress.
? Place high frequency ceramic input and output capaci -
tors next to the V D , PGND and V OUT pins to minimize
high frequency noise.
? Use round corners for the PCB copper layer to minimize
the radiated noise.
? To minimize the EMI noise and reduce module thermal
stress, use multiple vias for interconnection between
top layer and other power layers.
? Do not put vias directly on pads.
? If vias are placed onto the pads, the the vias must be
capped.
? Interstitial via placement can also be used if necessary.
? Use a separated SGND ground copper area for com -
ponents connected to signal pins. Connect the SGND
to PGND underneath the unit.
? Place one or more high frequency ceramic capacitors
close to the connection into the system board.
Figure 17 gives a good example of the recommended layout.
? Place a dedicated power ground layer underneath the
unit.
4613f
20
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